Skip to Main Content
Keywords: Circuit simulation
Close
Follow your search
Access your saved searches in your account
Would you like to receive an alert when new items match your search?
Close Modal
Sort by
Journal Articles

Worst-case analysis of electronic circuits based on an analytic forward solver approach

Open Access
Mario Schenk, Annette Muetze, Klaus Krischan, Christian Magele
Journal: COMPEL - The international journal for computation and mathematics in electrical and electronic engineering
COMPEL (2019) 38 (5): 1655–1666.
https://doi.org/10.1108/COMPEL-12-2018-0531
Published: 19 September 2019
.../legalcode Computer-aided design Transient analysis Circuit analysis Power electronic simulation Circuit simulation SQP Time-domain analysis Electronic components always come along with certain tolerances; therefore, worst-case dimensioning of electronic circuits composed...
View article titled, Worst-case analysis of electronic circuits based on an analytic forward solver approach
Open the PDF for Worst-case analysis of electronic circuits based on an analytic forward solver approach in another window
Add to Citation Manager for Worst-case analysis of electronic circuits based on an analytic forward solver approach
Journal Articles

A vertex cut algorithm for model order reduction of parasitic resistive networks

Available to Purchase
Petko Kitanov, Odile Marcotte, Wil H.A. Schilders, Suzanne M. Shontz
Journal: COMPEL - The international journal for computation and mathematics in electrical and electronic engineering
COMPEL (2012) 31 (6): 1850–1871.
https://doi.org/10.1108/03321641211267155
Published: 09 November 2012
... in order to reduce a parasitic resistive network. An undirected graph G=(U, E) is said to be complete if its edge set includes every pair of vertices. © Emerald Group Publishing Limited 2012 Circuit simulation Graph algorithms Model order reduction Parasitic...
View article titled, A vertex cut algorithm for model order reduction of parasitic resistive networks
Open the PDF for A vertex cut algorithm for model order reduction of parasitic resistive networks in another window
Add to Citation Manager for A vertex cut algorithm for model order reduction of parasitic resistive networks
This Feature Is Available To Subscribers Only

or Create an Account

Close Modal
Close Modal

Gift article access

As a benefit of your subscription, you can share temporary access to restricted articles.

Each link will stop working after 30 days or 10 uses. You may create up to 10 links in a 30 day period.

Please sign in to your personal account to gift article access.

Register

Gift article access

As a benefit of your subscription, you can share temporary access to restricted articles.

Each link will stop working after 30 days or 10 uses. You may create up to 10 links in a 30 day period.

Gift articles remaining: --

Gift article access

Each link will stop working after 30 days or 10 uses. You may create up to 10 links in a 30 day period.

Gift articles remaining: --

Gift article access

As a benefit of your subscription, you can share temporary access to restricted articles.

Each link will stop working after 30 days or 10 uses.

You have reached the limit of 10 links within a 30 day period.

Sharing Unavailable

Sharing content requires targeting cookies to be enabled. Please update your cookie preferences to use this feature.