Skip to Main Content
Article navigation

The increasing level of integration in PCB technology demands from the designer a new level of sensitivity to high electrical field problems and to the degradation processes that may be involved. High electrical fields interacting with thermal and mechanical stresses could lead to the growth of‘latent defects’, not easily identifiable during final stage acceptance tests, that could lead the PCB's failure during service. The paper discusses degradation mechanisms which can lead to dielectric failure, together with first results relevant to a wider research project regarding identification of latent defects in PCBs and the development of new test procedures.

You do not currently have access to this content.
Don't already have an account? Register

Purchased this content as a guest? Enter your email address to restore access.

Please enter valid email address.
Email address must be 94 characters or fewer.
Pay-Per-View Access
$41.00
Rental

or Create an Account

Close Modal
Close Modal