Efficient partial product reduction for image processing application using approximate 4:2 compressor

Kattekola Naresh has obtained his BTech degree from Jyothishmathi Institute of Technology and Science, Karimnagar, and Master’s degree from CVR Engineering College, Hyderabad. He is currently working as an Assistant Professor in ECE Department, VNRVJIET, Hyderabad, and pursuing PhD from National Institute of Technology (NIT) Meghalaya, Shillong. He published papers on low power VLSI applications. His area of interest is low power techniques, low power VLSI design, field programmable gate array (FPGA) implementation, arithmetic circuits and approximate computing.

Amol Jawale completed his Bachelor of Engineering (2015) in Electronics and Telecommunication Engineering from Savitribai Phule Pune University, and MTech (2019) in Electronics and Communication Engineering with specialization in VLSI from National Institute of Technology, Meghalaya. He was a Junior Research Fellow (2019) and Research Assistant (2020) at National Institute of Technology and Faculty of Computer and Information Science, University of Ljubljana, respectively. He received a scholarship from the Ministry of Human Resource Department, Government of India for pursuing his MTech. His research interests include reconfigurable approximate computing, approximation of compressor-multipliers and hardware/software co-design of deep neural networks.

Pallab Kumar Nath completed his BTech (2005) in Electronics and Communication Engineering from West Bengal University of Technology, and MTech (2009) in VLSI Design from Bengal Engineering and Science University (now Indian Institute of Engineering Science and Technology), Shibpur, India. He received his PhD degree from Indian Institute of Technology Kharagpur in 2018. He is presently serving as a Research Associate in NeuRonICS Lab at Indian Institute of Science, Bangalore. His research interests include VLSI architecture design for image and video processing algorithms, FPGA-based embedded system design and hardware accelerator design for machine learning and deep learning algorithms.

Dr Shubhankar Majumdar is working as an Assistant Professor in the Department of Electronics and Communication of NIT, Meghalaya. He has got five awards those are Marie Sklodowska-Curie Actions Seal of Excellence award from European Commission, two postdoctoral scholarships from Italian Government and Government of India and fellowship for pursuing MTech and PhD. Further he is a Mentor of start-up incubation company, namely, SOIL Agritech Private Limited. During his PhD, he has made significant contributions on several techniques to model and incorporate the device experimental data for the circuit level design in EDA tool. Till date his publication count is 40 which includes reputed SCI journals and peer-reviewed Conferences. Presently he has 11 sponsored projects (international, national and state level projects), which have a worth of $1.5m.