.... For the hardware, the authors propose an field programmable gate array (FPGA)-based DMAC, which transfers the data to the graphics processing unit (GPU) using PCI-Express. The workload characterization technique is designed using Python software and is implementable for the advanced risk machine Cortex...

... is Network-on-chip (NoC). In the literature, there are several NoCs which can reconfigurable dynamically and can easily test and validate the results on FPGA. But still, NoCs have limitations which are regarding chip area, reconfigurable time and throughput. Design/methodology/approach To address...

... to use as reuse of registers. The direct structure has less register usage allows for parallel process and easy for implementation on field-programmable gate array (FPGA). The performance analysis of FIR filter is the consumption of number of look-up table (LUT) and resources such as FFs, slices...