In wafer fabrication, the material cost of wafer is expensive. It is imperative to repair the defective wafers produced during the manufacturing process for reducing the cost and increasing the yield of wafer fabrication. However, repairing defective wafer will not only increase the work‐in‐process (WIP) level but the flow time of rework lots as well. In wafer fabrication, rework of wafer is only allowed in the photolithography area, where is the bottleneck of the entire wafer fab. The purpose of this paper is to develop a dispatching rule concerned with rework for photolithography area.
The research developed a load‐oriented integrated rule, Re‐Disp, to consider the lots' sequencing decision and rework consideration at the photolithography area, in wafer fabrication. Simulation test and statistical analysis have been done on a virtual wafer fabrication plant. In the simulation model, some combinations of dispatching and rework rules, which are popular in practice, have been modeled for benchmarking.
Integrated rules, Re‐Disp, is better than those combinations of dispatching rules and rework rules under statistical analysis. System will be more stable when the integrated dispatching rule is used for control of the wafer schedule.
The paper developed a new dispatching rule for wafer fabrication concerned with rework for photolithography.
