This paper presents a simulation-based systematic characterization of a dual-metal-stack grooved-step-gate (DMS-GSG) silicon-on-nothing (SON) metal–oxide–semiconductor field-effect transistor (MOSFET) with stack buried oxide (SBO) for restraining short-channel effects (SCEs). Comparison was done between silicon-on-insulator (SOI) and SON SBO grooved-gate (GG) MOSFETs to realize the feasibility of the presented structure. Analysis of thermal stability over a wide range of temperatures was carried out for better characterization of the proposed structure. Further, the impact of structural parameters such as the negative junction depth and the influence of the work-function difference on the threshold voltage, drain current and drain-induced barrier lowering were analyzed. The investigation revealed that the DMS-GSG SON MOSFET is more prominent than other GG SOI MOSFETs in terms of switching behavior, SCEs, hot-carrier effect, intrinsic gain and early voltage. Further, the presence of air in the SBO of the DMS-GSG SON MOSFET suppresses the self-heating effect. Thus, this in-depth investigation is relatively beneficial to find out the performance improvement of SON structures over SOI ones for nanoscale short-channel devices.
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17 December 2019
Research Article|
November 22 2019
Grooved-gate silicon-on-nothing (SON) MOSFET: evidence for suppressing SCEs
Sikha Mishra, MTech;
Sikha Mishra, MTech
Assistant Professor
Device Simulation Laboratory, Department of Electronics and Communication Engineering, Siksha ‘O’ Anusandhan University, Bhubaneswar, India
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Soumya S Mohanty, MTech;
Soumya S Mohanty, MTech
Assistant Professor
Device Simulation Laboratory, Department of Electronics and Communication Engineering, Siksha ‘O’ Anusandhan University, Bhubaneswar, India
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Subhashree Bhol, MTech;
Subhashree Bhol, MTech
Student
Device Simulation Laboratory, Department of Electronics and Communication Engineering, Siksha ‘O’ Anusandhan University, Bhubaneswar, India
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Guru Prasad Mishra, PhD
Department of Electronics and Telecommunication Engineering, National Institute of Technology Raipur, Raipur, India
(corresponding author: gpscmishra.etc@nitrr.ac.in)
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(corresponding author: gpscmishra.etc@nitrr.ac.in)
Publisher: Emerald Publishing
Received:
May 22 2019
Accepted:
October 28 2019
Online ISSN: 2045-984X
Print ISSN: 2045-9831
ICE Publishing: All rights reserved
2019
Nanomaterials and Energy (2019) 8 (2): 159–166.
Article history
Received:
May 22 2019
Accepted:
October 28 2019
Citation
Mishra S, Mohanty SS, Bhol S, Mishra GP (2019), "Grooved-gate silicon-on-nothing (SON) MOSFET: evidence for suppressing SCEs". Nanomaterials and Energy, Vol. 8 No. 2 pp. 159–166, doi: https://doi.org/10.1680/jnaen.19.00023
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