Work function variability and inverter design possibility in advanced gate all around FETs

Gate-all-around (GAA) nanosheet field-effect transistors (NSFETs) are a potential replacement for the state-of-the-art fin field-effect transistor (FinFET) devices at advanced technology nodes. In this paper, the impact of process-induced variability such as gate work function variation (WFV) on NSFETs using three-dimensional technology computer-aided design numerical device simulation is studied. The WFVs of NSFETs and nanowire field-effect transistors (NWFETs) using multiple stack channels are also analyzed. The fluctuations in the threshold voltage (σV _TH) and on current (σI _on) of NSFETs are mainly affected by the WFV of the metal gate. It is observed that single and three-stacked NSFETs show superior immunity to WFV compared with NWFETs. Furthermore, a layout-based NSFET inverter design using the design technology co-optimization technique is followed, and the advantages of stacked NSFETs in terms of delay, power dissipation and switching energy are also reported.