While miniaturized pressure sensors are well-established, conventional silicon-based devices suffer from PN junction breakdown at high temperatures, leading to significant performance degradation. Silicon-on-Insulator sensors offer a solution for high-temperature applications but face persistent challenges in doping control, deep silicon etching and high-temperature packaging. These challenges hinder the simultaneous achievement of miniaturization, high-temperature resilience and high performance. This study aims to overcome these limitations by systematically optimizing these critcal manufacturing and packaging processes.
In this paper, a backside-sensing miniature flat high-temperature pressure sensor is designed. Through simulations and experiments, the optimal doping process and deep silicon etching process for manufacturing the corresponding presure-sensitive chip are investigated. For the packaging of the pressure-sensitive chip and the extraction of electrical signals, the deep-hole physical vapor deposition technology for the metal seed layer and the high-temperature reliable interconnection surface mount technology are employed to ensure the reliability of the pressure sensor in high-temperature environments.
This pressure sensor has an operating temperature range of −55°C to 235°C, a nonlinearity of 0.3% FS and a thermal sensitivity drift of ±0.018%/°C. It demonstrates excellent comprehensive performance, which fully proves that its design is reliable and reasonable.
Compared with existing studies that mostly focus on the analysis of a single packaging technology for flat pressure sensors, this paper proposes a set of optimization schemes for key steps covering the entire process from chip manufacturing to chip packaging, which effectively improves the overall performance of the sensor.
