Absorbing boundary conditions for compact modeling of on‐chip passive structures

The paper has the purpose of proposing a new open boundary condition to be used in conjunction with the finite integration technique (FIT) for the modelling of passive on‐chip components.

This boundary condition is ensured by using a virtual layer that surrounds the computational domain.

The paper proves which are the optimal material properties of the equivalent layer of open boundary.

When modelling passive on‐chip components with FIT, the method proposed is more efficient than the strategic dual image technique.

The paper shows the advantage of this approach – that the analysis algorithm remains unchanged, while saving the field‐circuit compatibility properties, such as current conservation.