The purpose of this paper is to present a fixed‐point implementation of a complete direct torque control (DTC) algorithm connected with a rotor speed estimation algorithm for the induction motor drive, using field‐programmable gate array (FPGA).
The parallel processing approach is described, which requires a decomposition of the control and estimation algorithms for the converter‐fed induction motor to several tasks, realised in parallel. The advanced data processing techniques are described, like PIPELINE technique for data streams design, coordinate rotation digital computer algorithm for transformation of stator flux vector components from Cartesian to polar coordinates. Moreover, the method for the qualitative analysis of the full‐order state observer's sensitivity to the variations of the induction motor equivalent circuit parameters is presented.
It is shown that the developed FPGA‐based DTC structure enables designing an efficient application for the induction motor control. Owing to the high‐processing frequency, the digital FPGA‐based DTC application is similar in its features to the analogue realisation based on the comparators. Yet all the advantages of the digital structure, i.e. high flexibility, parameterization capability, etc. remain unchanged. Furthermore, FPGA is hardware realisation of a digital data processing algorithm; hence the reliability of the control system is improved.
The investigations are performed in the developing prototype setup, based on PXI‐1042 Industrial PC equipped with Xilinx Virtex‐II FPGA matrix, programmed with LabVIEW.
The experimental tests of the FPGA‐based implementation of the whole control structure of the sensorless DTC drive system are demonstrated. It is also shown, that the full‐order state observer with the speed adaptation loop is significantly sensitive to motor parameter variations in the low‐speed region, which must be taken into account while designing the adaptation algorithm for speed estimation in real application.
The paper's value lies in the overall, FPGA‐based design of the speed sensorless DTC structure for the induction motor including motor speed, torque and stator flux control loops, stator flux and rotor speed estimation.
