Addressing Process Variations at the Microarchitecture and System Level

Technology scaling has resulted in an increasing magnitude of and sensitivity to manufacturing process variations. This has led to the adoption of statistical design methodologies as opposed to conventional static design techniques. At the same time, increasing design complexity has motivated a shift toward higher levels of design abstraction, i.e., micro-architecture and system level design. In this survey, we highlight emerging statistical design techniques targeted toward the analysis and mitigation of process variation at the system level design abstraction, for both conventional planar and emerging 3D integrated circuits. The topics covered include variability macro-modeling for logic modules, system level variability analysis for multi-core systems, and system level variability mitigation techniques. We conclude with some pointers toward future research directions.