Price/Density Tradeoffs of Multi‐chip Modules Available to Purchase

When designing electronic systems it is very useful to analyse the relationship between the interconnection capacity of selected packaging methods and their prices. Such an analysis is provided for the entire gamut of the interconnection spectrum: from one‐sided PCBs to complex ICs, by a plot of the log of substrate price/sq. inch versus the log of substrate density expressed in inches of conductors/sq. inch of substrate. The use of such a graphic method of analysis can produce interesting and useful insights into the potentials and tradeoffs between various current and future IC packaging approaches. After a short description and analysis of that log‐log plot, this paper will apply this methodology to the derivation of the general cost relation of IC interconnections on the next level of substrates. It specifically will attempt to establish a general price relationship between packaging approaches using bare (uncased) chips and the chips packaged in individual packages. As a result, the cost‐effectiveness of the use of Multi‐chip Module technology in the regions of very high interconnection densities will be derived and its competitiveness against other interconnection methods will be analysed.