As technology advances the demand for an analog-to digital converter has increased, as every application demands a converter as per its parameters. Currently, work is done on improvement of data converters at three levels of design – architectural, circuit and physical level. This paper aims to review the work done in the field of analog-to-digital converters (ADCs) at architectural and circuit level and discusses the achievements in this field. Furthermore, a new architecture is proposed, which works at higher resolution and provides optimum design parameters at low power consumption.
A hybrid architecture combining the features of synthetic approximation register and sigma-delta ADC is presented. The validity of the proposed design at architectural level is verified using MATLAB SIMULINK simulations.
The design simulation was tested for a sinusoidal wave of 1 V at the test frequency of 60 Hz. The design consumes least power, and is found to yield an error of the order less than 10–3 V, thus providing highly accurate digital output.
The design is applicable in many applications including biomedical systems, Internet-of-Things and earthquake engineering. This architecture can be further optimized to obtain better performance parameters.
