To propose a solution procedure to minimize/eliminate tombstoning defects in small chip components with different micro via‐in pad designs for high density module assembly.
Four different micro via‐in pad designs were compared (via‐hole diameter): ultra small via‐in pads (10 μm), small via‐in pads (20 μm) and large via‐in pads (60 μm), as well as designs with no via‐in pads and capped via‐in pads. Two process variables were also evaluated for the goal of achieving a high‐yield assembly solution in micro via‐in pad and lead‐free solder conditions. Potential factors such as the preheat conditions of the reflow profile and stencil aperture size, which might affect tombstoning in components with micro via‐in pads, were investigated.
The results indicated that the micro via‐in pad design significantly increased the tombstoning; thus, tombstoning did not occur in components with both no via‐in pads and capped via‐in pads. Capped via‐in pads exhibited the best results in preventing tombstoning and provided a wide process window for the selection of process parameters. The results showed that tombstoning was found to decrease with both increasing stencil opening ratio and use of reflow profile with long‐preheat condition.
The paper's findings provide certain process guidelines for high density module assemblies with via‐in pad design. The strategy is to prevent tombstoning by adopting capped via‐in pad design if possible when employing micro via‐in pad technology.
