The Impact of Boundary‐scan on Surface Mount Technology in Design, Manufacturing and System Test

With the emergence of surface mount technology and, more recently, advances in packaging technologies (i.e., ball grid arrays), test continues to be a complex, time‐consuming process and, in the limit, unfeasible. The adoption of IEEE 1149.1 boundary‐scan and the wide acceptance of this standard have resulted in a pragmatic test solution for densely packed SMT circuit boards. Many organisations have become extremely successful in manufacturing test through their commitment to boundary‐scan. Although boundary‐scan has alleviated many of the test engineer's problems, all but a handful of these organisations have a narrow focus of using boundary‐scan to benefit only manufacturing test. However, this same technology can be exploited in design, at the prototype debug stage, as well as at the system test level, whether it be in the factory or the field, yielding significant benefits throughout the entire product life cycle. Three case studies are reviewed to highlight the problems posed by SMT at prototype debug, manufacturing test and system level test. The impact of boundary‐scan is illustrated at each stage of a product's typical life cycle. The paper looks at some real applications and benefits of boundary‐scan at the board prototype stage, the manufacturing test stage, as well as at the system‐level stage. The data presented represent three distinct industries: computer manufacturing, telecommunications and automatic test equipment.