Quasi‐static models of n‐terminal semiconductor devices usually express terminal currents as the sum of steady‐state and transient components. We consider here the formulation where these transient components are assumed to be time derivatives of charges associated with the terminals and these charges are completely specified by the terminal voltages applied to the device. This paper describes a method for extracting these terminal charges from two‐dimensional device simulations of MOS transistors. The technique was used to obtain terminal charges for an n‐channel MOS transistor and some results are presented. In addition, charge tables were generated and used in a table model for MOS transistors. The transient behavior of a circuit using this table model is compared with a physical time‐domain simulation.
Article navigation
1 February 1987
Review Article|
February 01 1987
THE EXTRACTION OF TERMINAL CHARGES FROM TWO‐DIMENSIONAL DEVICE SIMULATIONS OF MOS TRANSISTORS
E.J. PRENDERGAST;
E.J. PRENDERGAST
AT&T Bell Laboratories, Allentown, PA 18103, USA
Search for other works by this author on:
P. LLOYD;
P. LLOYD
AT&T Bell Laboratories, Allentown, PA 18103, USA
Search for other works by this author on:
H. DIRKS
H. DIRKS
Consultant from Institute fur Theoretische, Electrotechnik, University of Aachen, Aachen, West Germany
Search for other works by this author on:
Publisher: Emerald Publishing
Online ISSN: 2054-5606
Print ISSN: 0332-1649
© MCB UP Limited
1987
COMPEL (1987) 6 (2): 107–114.
Citation
PRENDERGAST E, LLOYD P, DIRKS H (1987), "THE EXTRACTION OF TERMINAL CHARGES FROM TWO‐DIMENSIONAL DEVICE SIMULATIONS OF MOS TRANSISTORS". COMPEL, Vol. 6 No. 2 pp. 107–114, doi: https://doi.org/10.1108/eb010309
Download citation file:
New and popular articles
Suggested Reading
Synaptic plasticity of TiO2 nanowire transistor
Microelectronics International (February,2020)
THERMALLY INDUCED FAILURE IN GaAs TRANSISTORS EXPOSED TO α PARTICLE IRRADIATION
COMPEL (April,1994)
Introducing the Transistor into HNC Courses
Technical Education and Industrial Training (June,1959)
Research of tripartite trench termination for power buried‐gate SIT
COMPEL (March,2010)
Failure analysis of solder layer in power transistor
Soldering & Surface Mount Technology (December,2017)
Related Chapters
Transcending Engineering Practice: NOR on the Path from Transistor Technology to Universal Indeterminacy
George Spencer Brown's “Design with the NOR”: With Related Essays
Termination by Employer
FIDIC Silver Book: A Companion to the 2017 EPC/Turnkey Contract, Revised Edition
Termination by Employer
FIDIC Yellow Book: A Companion to the 2017 Plant and Design-Build Contract, Revised Edition
Recommended for you
These recommendations are informed by your reading behaviors and indicated interests.
