Interface defects detection and quantification on a Si/SiO₂ structure

The purpose of this paper is to investigate and classify the defects on silicon-based power devices under extreme conditions.

Electrical characterization was performed on MOS devices to study their interface defects. The devices were subjected to a voltage or a current constraint to induce defects, and then measurements were done to detect the effects of those defects. Measurements include current voltage, capacitance and conductance characterization. The Hill–Coleman method was used to calculate the interface states density in each case.

It was found that most of the defects have energies within the upper band gap of the semiconductor.

The method used in this paper allows the determination of any interface defects on a Si/SiO₂ structure.