A comparison of routing estimation methods for microelectronic modules

It is often necessary to estimate the number of board layers in electronic modules before detailed routing is possible. Several methods for estimating board interconnect requirements prior to the existence of a netlist have been developed. Some estimation approaches depend on the use of heuristics derived from studying actually routed designs, while others depend on geometric or statistical arguments. The applicability and uncertainties associated with these estimation techniques are not widely understood. In this paper several different routing estimation methods are applied to a variety of printed wiring board and multichip module applications. The accuracy with which the methods predict the amount of required wiring is compared.