Open figure viewer
Purpose
The paper aims to present a simple rail‐to‐rail CMOS voltage follower.
Design/methodology/approach
The circuit is developed based on a complementary source follower with a common‐source output stage. The circuit is designed using a 0.13 μm CMOS technology, and operates under the supply voltage of 1.5 V. HSPICE is used to verify the circuit performance.
Findings
The simulations show output voltage swing of ±0.6 V (300 Ω load) with the total harmonic distortion of 0.55 per cent at the operating frequency of 3 MHz. The bandwidth and power dissipation are 657 MHz and 405 μW, respectively.
Originality/value
A simple rail‐to‐rail CMOS voltage follower is presented.
© Emerald Group Publishing Limited
2009
You do not currently have access to this content.
