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The demand for higher density circuit packs, limited mounting space, faster switching times and cost‐effective designs has encouraged designers to take another look at placing vias directly in the mounting pads of reflow soldered surface mounted components. The standard reasons for not putting vias in pads (V‐I‐P) such as solder wicking and joint integrity were addressed and found to be surmountable. A study was performed to investigate the effects that a via in the mounting pad(s) has on the solder joint of both discrete components and gull and J‐leaded ICs. The size of the via was varied as well as the location along the centre axis of the pad. It was found that the via diameter is a critical parameter while the via location has no noticeable effect on the solder joint. Different assembly methods were also investigated. Several of the assembled test boards are being subjected to thermal cycling to determine the joint reliability. The results of this study are reported in this document.

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