This paper describes the processing and electrical characterisation of an interconnection substrate technology called Combifilm. The study focuses on digital applications. According to calculations, the conductivity of the reference plane is shown not to be critical in the low gigahertz range. Electrical measurements were performed at low and high frequencies(up to 5 GHz). Measurements of the attenuation were compared with calculations. Crosstalk measurements were carried out from different line pitches and compared with numerical calculations. It was determined that a line pitch of 300 μm would give sufficiently low crosstalk for many digital applications. The SUSPENS model was used to estimate the performance of different substrate technologies for modules with high speed ECL circuits. Two hypothetical systems with different wiring demands were studied for each technology. For a module with low or moderate wiring demands, Combifilm yielded a silicon efficiency (silicon‐to‐substrate ratio) and a clock rate that were between the PCB‐based chip‐on‐board technology and thin‐film multilayer technology. The estimated clock rate was about 60% of that of the wire‐bonded thin‐film module. The module size of Combifilm was shown to be sensitive to the wiring demand, and for a high wiring density case the estimated size was approximately the same as for a chip‐on‐board module.
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1 April 1996
Research Article|
April 01 1996
Combifilm: A Novel Thick‐ and Thin‐film Technology with Two Signal Layers for High‐speed Hybrid Circuits Signal Layers for High‐speed Hybrid Circuits
U.P.I. Pedersen;
U.P.I. Pedersen
SINTEF‐DELAB, Trondheim, Norway
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O. Aaserud;
O. Aaserud
Department of Physical Electronics, University of Trondheim, Trondheim, Norway
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O.W. Bungum
O.W. Bungum
AME, Horten, Norway
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Publisher: Emerald Publishing
Online ISSN: 1758-812X
Print ISSN: 1356-5362
© MCB UP Limited
1996
Microelectronics International (1996) 13 (1): 16–19.
Citation
Pedersen U, Aaserud O, Bungum O (1996), "Combifilm: A Novel Thick‐ and Thin‐film Technology with Two Signal Layers for High‐speed Hybrid Circuits Signal Layers for High‐speed Hybrid Circuits". Microelectronics International, Vol. 13 No. 1 pp. 16–19, doi: https://doi.org/10.1108/13565369610800179
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