Tools for evaluation of electrical performance of chip‐on‐board devices Available to Purchase

The present paper discusses the development of a test methodology for evaluation of the electrical performance of flip‐chip devices. A dedicated test chip was designed for this experiment. The test structure contains passive and active semiconductor devices manufactured using CMOS technology. Bond pads were designed to facilitate bumping. A Printed Circuit Board (PCB) housing the flipped devices was also designed for easy access to the individual devices. A test set‐up for measuring the structures was developed and key device parameters to monitor the electrical performance of the structures were identified.The results show that the proposed test structure is a suitable tool for determining the electrical parameters of flip‐chip devices. The experimental set‐up is universal and can be adapted to suit different custom‐designed flip‐chip test structures. In addition, the developed test set‐up is computer controlled and allows easy adaptation to different measurement techniques and devices.