R.P. Agarwal
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Journal Articles

Effects of scaling on the impact ionization and sub‐threshold current in submicron MOSFETs

Bhavana Jharia, S. Sarkar, R.P. Agarwal
Journal: Microelectronics International
Microelectronics International (2007) 25 (1): 41–45.
https://doi.org/10.1108/13565360810848156
Published: 28 December 2007
View article titled, Effects of scaling on the impact ionization and sub‐threshold current in submicron MOSFETs
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Journal Articles

Effect of line resistance and driver width on crosstalk in coupled VLSI interconnects

Brajesh Kumar Kaushik, Sankar Sarkar, R.P. Agarwal, R.C. Joshi
Journal: Microelectronics International
Microelectronics International (2007) 24 (3): 42–45.
https://doi.org/10.1108/13565360710779181
Published: 31 July 2007
View article titled, Effect of line resistance and driver width on crosstalk in coupled VLSI interconnects
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Journal Articles

Voltage scaling – a novel approach for crosstalk reduction in global VLSI interconnects

B.K. Kaushik, S. Sarkar, R.P. Agarwal, R.C. Joshi
Journal: Microelectronics International
Microelectronics International (2007) 24 (1): 40–45.
https://doi.org/10.1108/13565360710725937
Published: 02 January 2007
View article titled, Voltage scaling – a novel approach for crosstalk reduction in global VLSI interconnects
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Journal Articles

Crosstalk analysis and repeater insertion in crosstalk aware coupled VLSI interconnects

Brajesh Kumar Kaushik, Sankar Sarkar, R.P. Agarwal, R.C. Joshi
Journal: Microelectronics International
Microelectronics International (2006) 23 (3): 55–63.
https://doi.org/10.1108/13565360610680776
Published: 01 September 2006
View article titled, Crosstalk analysis and repeater insertion in crosstalk aware coupled VLSI interconnects
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Journal Articles

Repeater stage timing analysis for VLSI resistive interconnects

Rajeevan Chandel, S. Sarkar, R.P. Agarwal
Journal: Microelectronics International
Microelectronics International (2006) 23 (3): 19–25.
https://doi.org/10.1108/13565360610680721
Published: 01 September 2006
View article titled, Repeater stage timing analysis for VLSI resistive interconnects
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Journal Articles

Width optimization of global inductive VLSI interconnects

Brajesh Kumar Kaushik, S. Sarkar, R.P. Agarwal
Journal: Microelectronics International
Microelectronics International (2006) 23 (1): 26–30.
https://doi.org/10.1108/13565360610642723
Published: 01 January 2006
View article titled, Width optimization of global inductive VLSI interconnects
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Journal Articles

Delay analysis of a single voltage‐scaled‐repeater driven long interconnect

Rajeevan Chandel, S. Sarkar, R.P. Agarwal
Journal: Microelectronics International
Microelectronics International (2005) 22 (3): 28–33.
https://doi.org/10.1108/13565360510610512
Published: 01 December 2005
View article titled, Delay analysis of a single voltage‐scaled‐repeater driven long interconnect
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Journal Articles

Transition time considerations in repeater‐chains

Rajeevan Chandel, S. Sarkar, R.P. Agarwal
Journal: Microelectronics International
Microelectronics International (2005) 22 (3): 39–40.
https://doi.org/10.1108/13565360510610530
Published: 01 December 2005
View article titled, Transition time considerations in repeater‐chains
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Journal Articles

Repeater insertion in global interconnects in VLSI circuits

Rajeevan Chandel, S. Sarkar, R.P. Agarwal
Journal: Microelectronics International
Microelectronics International (2005) 22 (1): 43–50.
https://doi.org/10.1108/13565360510575549
Published: 01 April 2005
View article titled, Repeater insertion in global interconnects in VLSI circuits
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