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Increases in component packing density and the consequent decrease in feature size in electronics products continue to place ever more emphasis on process design to manage or predict the outcome of the inherent process/materials interactions. The most significant pressure is for improved first‐off process yields because of high cost and technical difficulty of rework processes and concerns about the life of reworked products. The current dominant process for the production of surface mount assemblies is the reflow soldering of stencil printed solder paste. This paper presents the results of work that begins to describe the sub‐processes of solder paste reflow. It is essential to understand and optimise these complex physical processes when aiming for the six‐sigma level quality demands of electronics manufacture.

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